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ic2
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1994-06-24
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\ IC2 - Build the actual codes and return lengths of the instructions.
\ 9/85 RW Split off from instClasses
\ 3/06/86 GDC Fixed type 20, MOVEM
\ 7/10/86 mrh Fixed type 24, CALL for branches to this type of instruction
\ 1/16/94 rfl fixed type 20 to use mrh revmask, so that movem now works
\ TYPE14 - MOVE instruction
\ the bad one. and I do mean Bad ( Leroy Brown bad )
:CLASS type14 <super machInst
:M BUILD: { \ work flag size -- }
op1 getOp
op2 getOp
true -> flag
mode: op1 sr-type =
IF
false -> flag
sr>-code -> work
ea: op2 work or w,
THEN
mode: op2 sr-type =
IF
false -> flag
>sr-code -> work
ea: op1 work or w,
THEN
mode: op2 ccr-type =
IF
false -> flag
ccr-code -> work
ea: op1 work or w,
THEN
mode: op2 usp-type =
IF
false -> flag
usp-code -> work
reg: op1 work or w,
THEN
mode: op1 usp-type =
IF
false -> flag
usp-code -> work
reg: op2 work or -> work
8 ++> work
work w,
THEN
flag
IF
opSize
CASE
0 OF 1 -> size ENDOF
1 OF 3 -> size ENDOF
2 OF 2 -> size ENDOF
ENDCASE
get: bytecode -> work
Size 12 << work or -> work
reg: op2 9 << work or -> work
mode: op2 7 min 6 << work or -> work
ea: op1 work or -> work
work w,
op1 compIdxMode
op2 compIdxMode
THEN
;M
:M LENGTH: { \ len -- len }
op1 getOp
op1 get: srcMask check
op2 getOp
op2 get: dstMask check
mode: op1 usp-type = mode: op2 1 = not and
mode: op2 usp-type = mode: op1 1 = not and or
IF
208 asmError
THEN
1 -> len
op1 modesize ++> len
op2 modesize ++> len
len
;M
;CLASS
\ TYPE15 - MOVEQ. e.g. MOVEQ
:CLASS type15 <super machInst
:M BUILD: { \ work -- }
op1 getOp
op2 getOp
get: bytecode
value: op1 255 min 0 max or
reg: op2 9 << or
w,
;M
:M LENGTH: ( -- len )
op1 getOp
op1 get: srcMask check
op2 getOp
op2 get: dstMask check
1
;M
;CLASS
\ TYPE16 - TRAP, e.g. TRAP #12
:CLASS type16 <super machInst
:M BUILD:
op1 getOp
get: bytecode
value: op1 15 min 0 max or
w,
;M
:M LENGTH:
op1 getOp
op1 get: srcMask check
1
;M
;CLASS
\ TYPE18 - MOVEP
:CLASS type18 <super machInst
:M LENGTH: ( -- len )
op1 getOp
op1 get: srcMask check
op2 getOp
op2 get: dstMask check
1
op1 modesize +
op2 modesize +
;M
:M BUILD: { \ work mode dreg areg aOp -- }
op1 getOp
op2 getOp
mode: op1 0=
IF
opSize 2 =
IF
7 -> mode
ELSE
6 -> mode
THEN
reg: op1 -> dreg
reg: op2 -> areg
op2 -> aOp
ELSE
opSize 2 =
IF
5 -> mode
ELSE
4 -> mode
THEN
reg: op2 -> dreg
reg: op1 -> areg
op1 -> aOp
THEN
get: bytecode -> work
dreg 9 << work or -> work
mode 6 << work or -> work
areg work or -> work
work w,
aOp compidxmode
;M
;CLASS
\ TYPE19 - DBCC, etc.
:CLASS type19 <super machInst
:M BUILD:
op1 getOp
op2 getOp
get: bytecode
reg: op1 or
w,
op2 compIdxMode
;M
:M LENGTH:
op1 getOp
op1 get: srcMask check
op2 getOp
op2 get: dstMask check
2
;M
;CLASS
\ TYPE20 - MOVEM
:CLASS type20 <super machInst
:M BUILD: { \ opDesc regMask drFlag -- }
msg" build moveMsg"
op1 getOp
mode: op1 0= mode: op1 1 = or
IF \ register list in operand 1
msg" exec IF"
op1 false buildRegMask -> regMask
\ make register mask. Flag always 1.
op2 getOp
0 -> drFlag
ea: op2
ELSE \ register list in operand 2
msg" exec ELSE"
1 -> drFlag
nextToken drop
op2 getOp
op2 false buildRegMask -> regMask
ea: op1
THEN
( ea in stack ) get: bytecode or
drFlag 10 << or
opSize 1 max 1- 6 << or w,
regMask
mode: op2 4 = IF revMask THEN \ Reverse mask if predecrement
val" regmask is " w,
op1 compidxmode
op2 compidxmode
;M
:M LENGTH: { \ len -- len }
2 -> len
op1 getop
mode: op1 2- 0<
IF
op1 false buildRegMask drop
op2 getop
op2 modesize ++> len
ELSE
op2 getop
op1 modesize ++> len
THEN
len
\ Force input of a new line.
0 -> tiblen 0 -> pos
;M
;CLASS
\ TYPE21 - UNLK
:CLASS type21 <super machInst
:M BUILD:
op1 getOp
get: bytecode
reg: op1 or
w,
;M
:M LENGTH:
op1 getOp
op1 get: srcMask check
1
;M
;CLASS
\ TYPE22 - ADDX, SUBX, CMPM
:CLASS type22 <super machInst
:M BUILD: { \ work -- }
op1 getOp
op2 getOp
get: bytecode -> work
reg: op1 work or -> work
opsize 6 << work or -> work
reg: op2 9 << work or -> work
mode: op1 4 =
IF
8 work or -> work
THEN
work w,
;M
:M LENGTH: { \ len -- len }
op1 getOp
op1 get: srcMask check
op2 getOp
op2 get: dstMask check
mode: op1 mode: op2 = not
IF
207 asmError
THEN
1 -> len
op1 modesize ++> len
op2 modesize ++> len
len
;M
;CLASS
:CLASS type23 <super machInst
:M LENGTH:
0
tiblen -> pos
;M
:M BUILD:
tiblen -> pos
;M
;CLASS
:CLASS type24 <SUPER machInst
:M LENGTH:
1
tiblen -> pos
;M
:M BUILD:
nextToken drop
get: token AsmCall
;M
;CLASS
\ TYPE26 - Sized instruction with single ea operand, e.g. NOT, CLR, NEG
:CLASS type26 <SUPER machinst
:M LENGTH:
op1 getOp
op1 get: srcMask check
1 op1 modesize +
;M
:M BUILD:
op1 getOp
get: bytecode ea: op1 or
opSize 6 << or w,
op1 compidxmode
;M
;CLASS
:CLASS type27 <SUPER machinst
:M LENGTH:
op1 getOp
op1 get: srcMask check
2
;M
:M BUILD:
op1 getOp
get: bytecode w,
value: op1 w,
;M
;CLASS